Status

Returns the status flags of the Q8 data acquisition system.

Library

qctools

Description

The Status block for the Q8 series of I/O cards provides a mechanism for checking the status flags of the card. It reads the Status Register of the Q8 card. Each output reflects the status of that particular flag. The output is high when the status flag is high and low otherwise. The block queries the Status Register each sampling instant. Note that unlike the Interrupt Status Register, the status flags are not latched. It is recommended that the Poll Interrupts series of blocks be used to poll fast status flags, such as the analog flags ADC03EOC and ADC47EOC. Also, one of the more specific Status blocks is generally used, unless a large number of status flags are employed. To prevent warnings from Simulink, put a Terminator block on unused outputs. The Status series of blocks may be used in Windows regardless of the status of the Q8 Windows driver.

Refer to the help on the "EXT_INT acts as watchdog" parameter for information on how to have the watchdog timer on one Q8 acts as a watchdog for a set of Q8 cards.

Block Outputs

ENC0FLG1

The output reflects FLG1 of encoder channel 0. The value of FLG1 may be configured using an Encoder Input block or the Configure Encoder I/O block.

ENC0FLG2

The output reflects FLG2 of encoder channel 0. The value of FLG2 may be configured using an Encoder Input block or the Configure Encoder I/O block.

ENC1FLG1

The output reflects FLG1 of encoder channel 1. The value of FLG1 may be configured using an Encoder Input block or the Configure Encoder I/O block.

ENC1FLG2

The output reflects FLG2 of encoder channel 1. The value of FLG2 may be configured using an Encoder Input block or the Configure Encoder I/O block.

ENC2FLG1

The output reflects FLG1 of encoder channel 2. The value of FLG1 may be configured using an Encoder Input block or the Configure Encoder I/O block.

ENC2FLG2

The output reflects FLG2 of encoder channel 2. The value of FLG2 may be configured using an Encoder Input block or the Configure Encoder I/O block.

ENC3FLG1

The output reflects FLG1 of encoder channel 3. The value of FLG1 may be configured using an Encoder Input block or the Configure Encoder I/O block.

ENC3FLG2

The output reflects FLG2 of encoder channel 3. The value of FLG2 may be configured using an Encoder Input block or the Configure Encoder I/O block.

ENC4FLG1

The output reflects FLG1 of encoder channel 4. The value of FLG1 may be configured using an Encoder Input block or the Configure Encoder I/O block.

ENC4FLG2

The output reflects FLG2 of encoder channel 4. The value of FLG2 may be configured using an Encoder Input block or the Configure Encoder I/O block.

ENC5FLG1

The output reflects FLG1 of encoder channel 5. The value of FLG1 may be configured using an Encoder Input block or the Configure Encoder I/O block.

ENC5FLG2

The output reflects FLG2 of encoder channel 5. The value of FLG2 may be configured using an Encoder Input block or the Configure Encoder I/O block.

ENC6FLG1

The output reflects FLG1 of encoder channel 6. The value of FLG1 may be configured using an Encoder Input block or the Configure Encoder I/O block.

ENC6FLG2

The output reflects FLG2 of encoder channel 6. The value of FLG2 may be configured using an Encoder Input block or the Configure Encoder I/O block.

ENC7FLG1

The output reflects FLG1 of encoder channel 7. The value of FLG1 may be configured using an Encoder Input block or the Configure Encoder I/O block.

ENC7FLG2

The output reflects FLG2 of encoder channel 7. The value of FLG2 may be configured using an Encoder Input block or the Configure Encoder I/O block.

ADC03EOC

The output reflects the status of the end-of-conversion signal of ADC03. ADC03 handles analog input channels 0-3. An end-of-conversion pulse occurs once for each channel converted. Since these end-of-conversion signals are quite brief (between 120 and 180ns), using the Status block for these flags is not recommended. Use the Poll Interrupts or Poll Analog Interrupts block instead, with the "Clear flags after reading" option checked.

ADC47EOC

The output reflects the status of the end-of-conversion signal of ADC47. ADC47 handles analog input channels 4-7. An end-of-conversion pulse occurs once for each channel converted. Since these end-of-conversion signals are quite brief (between 120 and 180ns), using the Status block for these flags is not recommended. Use the Poll Interrupts or Poll Analog Interrupts block instead, with the "Clear flags after reading" option checked.

ADC03RDY

The output reflects the status of the ready signal of ADC03. ADC03 handles analog input channels 0-3. The ready signal goes high only after all the selected channels in this range have been converted. It remains high until the start of the next conversion sequence.

ADC47RDY

The output reflects the status of the ready signal of ADC47. ADC47 handles analog input channels 4-7. The ready signal goes high only after all the selected channels in this range have been converted. It remains high until the start of the next conversion sequence.

ADC03FST

The output reflects the status of the "first-data" signal of ADC03. ADC03 handles analog input channels 0-3. The "first-data" signal goes high after the first channel has been converted and is available in the A/D FIFO. It remains high until the first conversion result is read from the FIFO and the FIFO pointer advances to the next conversion result.

ADC47FST

The output reflects the status of the "first-data" signal of ADC47. ADC47 handles analog input channels 4-7. The "first-data" signal goes high after the first channel has been converted and is available in the A/D FIFO. It remains high until the first conversion result is read from the FIFO and the FIFO pointer advances to the next conversion result.

FUSE

The output reflects the status of the fuse on the Q8 terminal board. If the fuse has blown or degraded such that the +5V power on the terminal board falls below 4V then this status flag is high. If the fuse is working properly, the this flag is low. Note that the fuse also acts as a hard watchdog. Failure of the fuse causes all analog outputs to be zeroed and all digital lines to be pulled high.

EXTINT

The output reflects the state of the EXT_INT line. This bit is not affected by EXT_INT polarity options. Hence, this bit of the Status Register may be used to treat the EXT_INT line as an extra digital input.

CNTREN

The output reflects the state of the CNTR_EN input. This bit is not affected by CNTR_EN polarity options. Hence, this bit of the Status Register may be used to treat the CNTR_EN line as an extra digital input.

Parameters and Dialog Box

Board Number

The board number of the I/O card. If there is only one Q8 board in your system, then the board number should be zero. The second Q8 board in your system is board number 1, etc.

Sample Time

A sample time must be specified for all discrete blocks. The default value extracts the sample time from the RTW Options dialog, under Solver/Fixed step size. A numeric value rather than 'auto' should be specified in this dialog field for this default to make sense.

EXT_INT Polarity

Polarity of the EXT_INT input. This option does not actually affect the EXT_INT status flag, but it does affect the operation of EXT_INT as a watchdog input (see the "EXT_INT acts as watchdog" option below). The EXT_INT line has a pullup resistor to bring it high when the input is unconnected. Hence, this option is normally unchecked by default.

EXT_INT Acts as Watchdog

If this option is checked then an edge on the EXT_INT input causes the analog outputs to be reset and the digital I/O lines to be pulled high. This option is useful for connecting limit switches and emergency stop buttons to the Q8. It can also be used to have the watchdog timer of one Q8 board act as a watchdog for a whole set of Q8 boards. To do so, use a Watchdog block on the "master" with the "Enable external output" option enabled. Then use a Poll Interrupts, Poll External Interrupt or External Status block with the "EXT_INT acts as watchdog" option checked for the slave boards.